PCIe bus architecture high performance data preprocessing board / K7 325t FMC interface data acquisition and transmission card

PCIE701 Based on a PCI Express High performance of bus FMC Interface PCIe Bus verification platform , The board has 1 individual FMC（HPC） Interface ,1 individual X8 PCIe Host interface , The board uses Xilinx A high performance Kintex-7 series FPGA As the main controller , Realization FMC Interface data collection and processing 、 as well as PCI Express Bus interface conversion . On board 1 Group independent 64 position DDR3 SDRAM Large capacity cache . The board is equipped with different FMC Sub card , It can be quickly built based on PCI Express Bus verification platform , The board is standard full height PCI Express Size , Suitable for current mainstream servers or workstations , It can be applied to server based data collection 、 Image acquisition 、 Video image transmission and other application scenarios .

Principle block diagram

Physical display

Performance indicators

standard PCI Express Full height half length card , accord with PCIE Physical and electrical standards ;
 Host interface support PCI Express Gen2.0 standard ：
 Optional x1、x4 or x8 Pattern , The theoretical bandwidth is as high as 4GByte/s;
 Suitable for x1、x4、x8 perhaps x16 Golden finger slot ;

On board memory ：
 1 Group 64 position 1GByte DDR3 SDRAM Memory （ Optional according to requirements , The biggest support 4GByte）;
 Can be realized 800MHz High speed data cache of clock rate , The theoretical bandwidth is as high as 12.8GByte/s,DDR3 SDRAM The reading and writing efficiency is as high as 90%;

 On board 8 Bit dial switch ：
 As the external manual input of the board , Flexible control of boards ;
 You can select the board to load different programs through the dial switch ;

Clock management ：

 On board 1 slice 125MHz LVDS Differential crystal oscillator , Through the clock BUFFER Output 4 road , Give to separately FPGA Global clock and FPGA
GTX Reference clock ;
 On board 1 slice 200MHz LVDS Differential clock supply DDR3 Reference clock of the controller ;
 On board 1 slice 100MHz LVDS The differential clock acts as PCIe Controller standby reference clock ;
 On board 1 slice 50MHz Crystal oscillator as reset or delay logic synchronization clock ;
 On board 1 Chip high precision programmable clock generator ：
 The programmable clock generator chip is ：AD9516-1：
 The programmable clock generator outputs the following clocks ：
Output 2 High precision phase synchronization （ be better than 5°） Of 50 Ohmic impedance single ended clock （ For high-precision synchronization ）;
Output 1 road LVPECL Differential clock supply FPGA Of GTX Reference clock ;
Output 1 road LVDS Differential clock supply FPGA Of GTX Reference clock （ spare ）;
Output 1 road LVPECL Differential clock supply FPGA Of DDR3 SDRAM system clock;
Output 1 road LVDS Differential clock supply FPGA Global clock ;
 Programmable clock generator support 3 Two clock input modes ：
On board 1 individual 10MHz Temperature compensated crystal oscillator TCXO, Temperature stability ±0.28ppm, Aging rate ±1ppm;
External input single ended reference clock ： AC coupling 、SSMB RF socket input ;
External input differential clock ： from FPGA produce ;
 Programmable clock generator adopts SPI How to configure ;
 Programmable clock generator internal phase-locked loop maximum support 2.5GHz;

 On board 1 slice 16Mbyte（128Mbit）SPI Flash, Used to store a small amount of parameter information ;
 On board 1 slice 128Mbyte（1Gbit） BPI Nor Flash, be used for FPGA Loading ;
 The board has rich digital discreteness IO Input / Output interface ：
 12 Road direction controllable bidirectional discrete digital IO Interface , Support 3.3V、5V Level standard ;
 Direction controllable discrete number IO, The driving ability can reach 20mA;
 16 Two way discrete digital IO Interface , Support 3.3V、5V Level standard ;
 The board has 1 road USB turn UART Interface , Use as serial port ：
 standard USB2.0 Micor Type B Interface ;
 The serial protocol chip is CP2104;
 The board has 1 road DVI Digital display interface ：
 DVI The driver chip of digital display output interface is ：TFP410;
 DVI Maximum support resolution 1080P;
 The board has 2 road RS485 Interface ;
 The interface chip adopts TI The company's SN65HVD75DR;
 The interface connector adopts RJ45（ Without transformer 、 Without lights ）;
 FMC（HPC） Interface performance ：
 Support x4 GTX High speed interconnection , The highest speed is 10Gbps/lane;
 Support 80 Yes LVDS Interface ;
 Support 1 road IIC serial interface ;
 Support +3.3V/+12V Power supply ;
 PCIe DMA performance ：
 x8 PCI Express gen2, Independent DMA passageway ：DMA The actual transmission bandwidth of uplink and downlink can reach 3GByte/s;
 Buffer mode support FIFO and DDR3 Two modes ;
 PCI Express The reference clock adopts the circuit clock of the motherboard ;
 FMC Sub card matching ：
 AD/DA Sub card ： For signal simulation 、 If signal acquisition 、 Software radio, etc ;
 Image sub card ： Used for image signal detection and analysis , Video signal source simulation, etc ;

Physical and electrical characteristics
 Board size ：106.65 x 167.65 mm;
 Board power supply ：+12V Power supply , Maximum power consumption 16W（ static state 4W）;
 working temperature ：0°C~+70°C;
 Storage temperature ：-40°C~+80°C;
 Working humidity ：5%~60%, non-condensing ;
 The way of cooling ： Air cooling ;

Software support
 Support Windows 7 32/64 Bit operating system ;
 Provide underlying drivers and API function ;
 Support user-defined algorithm design and system integration ;

Application scenarios
 Radar and if signal acquisition ;
 Video and image acquisition and analysis ;
 Hardware in the loop simulation system ;

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